68HC11 Technical Docs

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Changes to the EEPROM byte do not affect operation of the MCU until after the next reset sequence. When programming the CONFIG register, the EEPROM byte is being accessed. When the CONFIG register is being read, the static latches are being accessed. To change the value in the CONFIG register proceed as follows: 1. Erase the CONFIG register. CAUTION Do not issue a reset at this time. 3 2. Program the new value to the CONFIG register. 3. Issue a reset so the new configuration will take effect. MOTOROLA 3-12 ON-CHIP MEMORY MC68HC11A8 TECHNICAL DATA 4 PARALLEL I/O The MC68HC11A8 has 40 I/O pins arranged as five 8-bit ports.

Data transmission is initiated by a write to the serial communications data register (SCDR). Provided the transmitter is enabled, data stored in the SCDR is transferred to the transmit data shift register. This transfer of data sets the TDRE bit of the SCI status register (SCSR) and may generate an interrupt if the transmit interrupt is enabled. The transfer of data to the transmit data shift register is synchronized with the bit rate clock (Figure 5-7). All data is transmitted LSB first. Upon completion of data transmission, the transmission complete (TC) bit of the SCSR is set (provided no pending data, preamble, or break is to be sent), and an interrupt may be generated if the transmit complete interrupt is enabled.

Idle periods may be present within messages and no idle time is required between messages for this wake up method. 4 Receive Data (RxD) Receive data is the serial data which is applied through the input line and the serial communications interface to the internal bus. The receiver circuitry clocks the input at a rate equal to 16 times the baud rate and this time is referred to as the RT clock. MOTOROLA 5-2 SERIAL COMMUNICATIONS INTERFACE MC68HC11A8 TECHNICAL DATA Once a valid start bit is detected, the start bit, each data bit, and the stop bit are sampled three times at RT intervals 8 RT, 9 RT, and 10 RT (1 RT is the position where the bit is expected to start), as shown in Figure 5-2.

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